$TITLE(INTR_1.A51) ; Module INTR_1.A51 Rev 1.0 $XREF ; By Frank Fritz -- Copyright 1997 (C) Frank Fritz $DEBUG ; $NOLIST ; switch off generation of the listing file $NOMOD51 ; switch off 8051 controller defaults and use... $INCLUDE (c:\fsi\inc\reg51.inc) ; Include the 8051 register definitions/declarations. $LIST ; switch on listing. EXTRN DATA (temperature, intr_count, disp_val, ee_address, ee_lsb, ee_msb, ee_cntrl, pwm_cntr, error, cv, duty_cycle, i_old_h, i_old_l) EXTRN DATA (active_pb, limit_cntr_lo, limit_cntr_hi, old_temp, h_list_dptr, c_list_dptr) EXTRN XDATA (h_list, c_list) EXTRN BIT (on_targ_flag, pid_error_flag, limit_flag, DS1620_FLAG, eesv_flag, neg_flag, while_flag1, mode, while_dtt_flag, ai_tl_flag, error_flag) EXTRN NUMBER (TL0_val, TH0_val, TL1_val, TH1_val, intr_service, read_ee, write_ee, ewen, ewds, setpoint) EXTRN NUMBER (gain_p, gain_i, deadband_val, limit_lo_val, limit_hi_val) PUBLIC timer1int ; -------------------------------------------------------------------------------------------------------------------------------------------------------------------- ; TIMER 1 INTERRUPT ; -------------------------------------------------------------------------------------------------------------------------------------------------------------------- int1_code_seg SEGMENT CODE ; Segment declaration for interrupt function timer 1. RSEG int1_code_seg ; Switch to this code segment USING 2 ; Switch to register bank 2 for this interrupt routine. ; ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- ; Module: INTR_1 ; Revision: 1.0 ; Date: August 8, 1997 ; By: Frank Fritz ; About: INTR_1 is the PWM (Pulse-Width-Modulation) control for the output devices. INTR_1 is triggered every 312 uSec ; as internal interrupt timer 1 overflows from FFFFH to 0. ; ; The operation of INTR_1 is as follows: ; ; 1. Save present working environment (Acc, DPTR, etc.) ; 2. Reload Interrupt timer 1 time-out values. ; 3. Service the PWM counter (if counter = 0, 07F -> pwm_count, cv -> duty_cycle, turn on port bit). ; 4. Decrement pwm count, duty cycle count. ; 5. If duty cycle count = 0, turn off bit. ; 6. Reload previous environment. ; 7. Return execution to MAIN or INTR_0. ; ; ; Program Flow ; Called From: Interrupt timer 0 overflow ; Input: pwm_cntr, cv ; Output: Sets or Clears output port bits (P1.0 -- P1.4) ; Modifies: Nothing ; Calls: clr_pb, set_pb ; ; History Date Comments ; ---------------- -------------------------------------------------------------------------------------------------------------------------------- ; 08/08/97 Developed code. ; ; ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- timer1int: PUSH PSW MOV PSW,#10H ; Switch to register bank 2 PUSH ACC ; Save environment. PUSH B ; - PUSH DPH ; - PUSH DPL ; - CLR TR1 ; Turn off (stop) Timer 1. MOV TL1,#TL1_val ; Reload interrupt timer. MOV TH1,#TH1_val ; - SETB TR1 ; Turn on (run) Timer 1. ; Service the PWM counters. pwm_counter: DJNZ pwm_cntr,pwm_1 ; Service Device 1. Check for PWM update. MOV pwm_cntr,#07FH ; Reload cycle count. MOV duty_cycle,cv ; Reload working counter. LCALL set_pb ; Turn on ACTIVE device. pwm_1: MOV A,duty_cycle ; Check for timeout. JZ pwm_2 ; - DEC duty_cycle ; Count-down working counter. SJMP tm1int_x ; Exit. pwm_2: LCALL clr_pb ; Turn off ACTIVE device. ; Done - Return from interrupt. tm1int_x: POP DPL ; Return from interrupt. POP DPH ; - POP B ; - POP ACC ; Restore MAINLINE environment. POP PSW RETI clr_pb: MOV DPTR,#pwm_table_c ; Load table base address to clear ACTIVE bit. SJMP pb_op ; Do rest of routine. set_pb: MOV DPTR,#pwm_table_s ; Load table base address to set ACTIVE bit. pb_op: MOV A,active_pb ; Load active port bit to Acc. MOV B,#03H ; Do offset calculation. MUL AB ; Acc has offset. JMP @A+DPTR ; Branch to appropriate table position. pwm_table_s: SETB P1.0 ; Set active port bit P1.0. RET ; Return to PWM controller. SETB P1.1 ; Set active port bit P1.1. RET ; - SETB P1.2 ; Set active port bit P1.2. RET ; - SETB P1.3 ; Set active port bit P1.3. RET ; - SETB P1.4 ; Set active port bit P1.4. RET ; - pwm_table_c: CLR P1.0 ; Clear active port bit P1.0. RET ; Return to PWM controller. CLR P1.1 ; Clear active port bit P1.1. RET ; - CLR P1.2 ; Clear active port bit P1.2. RET ; - CLR P1.3 ; Clear active port bit P1.3. RET ; - CLR P1.4 ; Clear active port bit P1.4. RET ; - ; -------------------------------------------------------------------------------------------------------------------------------------------------------------------------- END